10AX115H2F34E2SG FPGA Arria® 10 GX Ezinụlọ 1150000 Cell 20nm Teknụzụ 0.9V 1152-Pin FC-FBGA
Nkọwa nka nka ngwaahịa
| EU RoHS | Dabara |
| ECN (US) | 3A991 |
| Ọnọdụ akụkụ | Na-arụ ọrụ |
| HTS | 8542.39.00.01 |
| SVHC | Ee |
| SVHC gafere oke | Ee |
| Ụgbọala | No |
| PPAP | No |
| Aha ezinụlọ | Arria® 10 GX |
| Usoro teknụzụ | 20nm |
| Onye ọrụ I/Os | 504 |
| Ọnụọgụ nke ndebanye aha | 1708800 |
| Voltaji na-arụ ọrụ (V) | 0.9 |
| Ihe mgbagha | 1150000 |
| Ọnụọgụ nke Multipliers | 3036 (18x19) |
| Ụdị ebe nchekwa mmemme | SRAM |
| Ebe nchekwa agbakwunyere (Kbit) | 54260 |
| Ngụkọta ọnụọgụ nke RAM ngọngọ | 2713 |
| Emacs | 3 |
| Ngalaba mgbagha ngwaọrụ | 1150000 |
| Nọmba ngwaọrụ nke DLLs/PLS | 32 |
| Ọwa transceiver | 96 |
| Ọsọ transceiver (Gbps) | 17.4 |
| DSP raara onwe ya nye | 1518 |
| PCIe | 4 |
| Enwere ike ime mmemme | Ee |
| Nkwado nhazigharị | Ee |
| Detuo Nchekwa | Ee |
| Mmemme n'ime sistemụ | Ee |
| Ọsọ Ọsọ | 2 |
| Ụkpụrụ I/O gwụchara otu | LVTTL|LVCMOS |
| Interface ebe nchekwa mpụga | DDR3 SDRAM|DDR4|LPDDR3|RLDRAM II|RLDRAM III|QDRII+SRAM |
| Voltaji na-arụ ọrụ kacha nta (V) | 0.87 |
| Voltaji na-arụ ọrụ kachasị (V) | 0.93 |
| Voltaji I/O (V) | 1.2|1.25|1.35|1.5|1.8|2.5|3| |
| Okpomọkụ arụ ọrụ kacha nta (°C) | 0 |
| Okpomọkụ kacha arụ ọrụ (°C) | 100 |
| Ọkwa okpomọkụ nke ndị na-eweta ya | Agbatịkwara |
| Aha ahia | Aria |
| Ịkwanye | Ugwu elu |
| Elu ngwugwu | 2.95 |
| Obosara ngwugwu | 35 |
| Ogologo ngwugwu | 35 |
| PCB gbanwere | 1152 |
| Aha ngwugwu ọkọlọtọ | BGA |
| Ngwungwu ngwa ahịa | FC-FBGA |
| Ngụ ntụtụ | 1152 |
| Ụdị ndu | Bọọlụ |
Ọdịiche na mmekọrịta dị n'etiti FPGA na CPLD
1. FPGA nkọwa na njirimara
FPGAnakweere echiche ọhụrụ aha ya bụ Logic Cell Array (LCA) na Configurable Logic Block (CLB) na ntinye ntinye (IOB) Block na Interconnect.The configurable mgbagha modul bụ isi unit ịghọta ọrụ onye ọrụ, nke a na-emekarị ndokwa n'ime ihe n'usoro na-agbasa dum mgbawa.Modul ntinye-mpụta IOB na-emecha interface dị n'etiti mgbawa na mgbawa na ngwungwu mpụga, a na-ahazikwa ya na gburugburu mgbawa n'usoro.Internal wiring nwere ogologo nke akụkụ waya dị iche iche na ụfọdụ mgbanwe njikọ programmable, nke na-ejikọta ihe mgbochi dị iche iche nke mmemme ma ọ bụ I/O blocks iji mepụta sekit nwere otu ọrụ.
Atụmatụ ndị bụ isi nke FPGA bụ:
- Iji FPGA chepụta sekit ASIC, ndị ọrụ adịghị mkpa imepụta mmepụta, nwere ike nweta mgbawa dabara adaba;
- Enwere ike iji FPGA dị ka nlele pilot nke ndị ọzọ ahaziri nke ọma ma ọ bụ nke ahaziri nke ọmaNdị sekit ASIC;
- Enwere ọtụtụ ihe na-akpalite na ntụtụ I/O na FPGA;
- FPGA bụ otu n'ime ngwaọrụ ndị nwere okirikiri imewe kacha dị mkpụmkpụ, ọnụ ahịa mmepe kachasị dị ala yana ihe egwu kachasị dị na sekit ASIC.
- FPGA na-anabata usoro CHMOS dị elu, ike dị ala, ma nwee ike dakọtara na ọkwa CMOS na TTL.
2, nkọwa na njirimara CPLD
CPLDbụ tumadi mejupụtara programmable Logic Macro Cell (LMC) gburugburu etiti nke programmable interconnection matrix unit, nke LMC mgbagha Ọdịdị bụ ihe mgbagwoju anya, na nwere mgbagwoju I / O unit interconnection Ọdịdị, nwere ike eme site na onye ọrụ dị ka si mkpa nke usoro sekit a kapịrị ọnụ, iji mezue ụfọdụ ọrụ.N'ihi na ejikọrọ ihe mgbochi mgbanaka ahụ na wires ọla edo edo edobere na CPLD, sekit mgbagha a haziri nwere amụma oge ma na-ezere mwepu nke amụma ezughị ezu nke oge nhazi njikọ njikọta nke agba.Ka ọ na-erule n'afọ 1990, CPLD tolitere ngwa ngwa, ọ bụghị naanị site na njirimara nchapụta ọkụ, kamakwa site na njirimara dị elu dị ka nyocha ihu na mmemme ịntanetị.
Njirimara nke mmemme CPLD bụ ndị a:
- Ihe ezi uche dị na ya na ebe nchekwa dị ukwuu (Cypress De1ta 39K200 nwere karịa 480 Kb nke RAM);
- Ụdị oge na-agbanwe agbanwe nwere akụrụngwa na-ebugharị na-adịghị arụ ọrụ;
- Na-agbanwe agbanwe iji gbanwee mmepụta pin;
- Enwere ike itinye ya na sistemụ ma megharịa ya;
- Ọnụ ọgụgụ buru ibu nke nkeji I/O;
3. Ọdịiche na njikọ dị n'etiti FPGA na CPLD
CPLD bụ abbreviation nke mgbagwoju programmable mgbagha ngwaọrụ,FPGA bụ abbreviation nke ubi programmable ọnụ ụzọ ámá array, ọrụ nke abụọ bụ isi otu, ma mmejuputa ụkpụrụ bụ ubé dị iche iche, otú anyị nwere ike mgbe ụfọdụ ileghara ọdịiche dị n'etiti abụọ, mkpokọta. akpọrọ dị ka ngwaọrụ mgbagha mmemme ma ọ bụ CPLD/FPGA.Enwere ọtụtụ ụlọ ọrụ na-emepụta CPLD/FPGs, atọ kachasị ukwuu bụ ATERA,XILINX, na LAT-TICE.CPLD ire ere nchikota mgbagha ọrụ siri ike nke ukwuu, otu nnukwu ngalaba nwere ike irere iri na abuo ma ọ bụ ọbụna karịa ntinye mgbagha 20-30.Agbanyeghị, LUT nke FPGA nwere ike ijikwa mgbagha nchikota nke ntinye 4, yabụ CPLD dabara adaba maka imepụta mgbagha ngwakọta dị mgbagwoju anya dị ka ngbanwe.Otú ọ dị, usoro mmepụta nke FPGA na-ekpebi na ọnụ ọgụgụ nke LUTs na ihe ndị na-akpali akpali dị na mgbawa FPGA dị nnọọ ukwuu, ọtụtụ puku kwuru puku, CPLD nwere ike nweta naanị nkeji 512 ezi uche dị na ya, ma ọ bụrụ na ekewa ọnụahịa mgbawa site na ọnụ ọgụgụ ezi uche dị na ya. nkeji, nkezi ọnụ ọgụgụ ezi uche dị na ya nke FPGA dị ala karịa nke CPLD.Ya mere, ọ bụrụ na a na-eji ọnụ ọgụgụ buru ibu nke na-akpali akpali na nhazi ahụ, dị ka ịmepụta oge mgbagwoju anya, mgbe ahụ iji FPGA bụ nhọrọ dị mma.
Ọ bụ ezie na ma FPGA na CPLD bụ ngwaọrụ ASIC nwere ike ime ma nwee ọtụtụ njirimara, n'ihi ọdịiche dị na nhazi nke CPLD na FPGA, ha nwere njirimara nke ha:
- CPLD dabara adaba maka ịmecha algọridim dị iche iche yana mgbagha nchikota, yana FPGA dabara adaba maka ịmecha mgbagha usoro.N'ikwu ya n'ụzọ ọzọ, FPGA dabara adaba maka nhazi akụ na-atụgharị flip-flop, ebe CPLD dabara adaba maka oke flip-flop yana usoro ngwaahịa bara ụba.
- Usoro nhazigharị nke CPLD na-aga n'ihu na-ekpebi na oge igbu oge ya bụ otu na nke a na-ahụ anya, ebe usoro nhazi ụzọ nke FPGA na-ekpebi na igbu oge ya enweghị atụ.
- FPGA nwere mgbanwe karịa CPLD na mmemme.
- A na-ahazi CPLD site n'ịgbanwe ọrụ mgbagha nke sekit dị n'ime, ebe a na-ahazi FPGA site n'ịgbanwe wiring njikọ dị n'ime.
- Enwere ike ịhazi Fpgas n'okpuru ọnụ ụzọ mgbagha, ebe a na-ahazi CPLDS n'okpuru mgbochi mgbagha.
- FPGA jikọtara ọnụ karịa CPLD ma nwee usoro wiring dị mgbagwoju anya yana mmejuputa mgbagha.
N'ozuzu, ike oriri nke CPLD buru ibu karịa nke FPGA, na ogo ntinye aka dị elu, ọ na-apụta ìhè karị.
